International Research Journal of Innovations in Engineering and Technology - IRJIET International Open Access, Monthly, Peer Reviewed, Reputed Journal ISSN (online): 2581-3048

Impact Factor (2025): 6.9

DOI Prefix: 10.47001/IRJIET

Comparison of Different Types of SPWM Techniques for Single Phase 31 Level Cascaded H-Bridge Inverter

Mona Hassan HusienDepartment of Electrical Engineering, Mosul University, IraqMohammed Ali AlrawiDepartment of Electrical Engineering, Mosul University, Iraq

Vol 6 No 9 (2022): Volume 6, Issue 9, September 2022 | Pages: 132-136

International Research Journal of Innovations in Engineering and Technology

OPEN ACCESS | Research Article | Published Date: 07-10-2022

doi Logo doi.org/10.47001/IRJIET/2022.609020

pdf iconFull Text PDF
Abstract

Multilevel inverters have been regarded as a superior choice for medium voltage and high power applications because they have good waveform quality, higher performance, and are made up of switching devices that are subjected to minimal pressures. The multilevel inverter is used to reduce harmonics to improve voltage quality. As the multilevel inverter's voltage levels increase, harmonics are reduced as well, which considerably reduces losses. This paper discusses the Level Shifted Carriers Based Pulse Width Modulation (LS-PWM) and phase-shifted carriers pulse width modulation (PS-PWM) Techniques for Single Phase inverters 31 levels. LSPWM is divided into three subgroups: phase disposition (PD), phase opposition disposition (POD), and alternate phase opposition disposition (APOD). Simulation data are obtained using MATLAB / SIMULINK.  Results show (PS-PWM) has less THD in output wave voltage than (LS-PWM).    

Keywords

Multilevel inverter, Sinusoidal pulse width modulation (SPWM), Total Harmonic Distortion (THD), phase disposition (PD), phase opposition disposition (POD), alternate phase opposition disposition (APOD)


Citation of this Article

Mona Hassan Husien, Mohammed Ali Alrawi, “Comparison of Different Types of SPWM Techniques for Single Phase 31 Level Cascaded H-Bridge Inverter” Published in International Research Journal of Innovations in Engineering and Technology - IRJIET, Volume 6, Issue 9, pp 132-136, September 2022. Article DOI https://doi.org/10.47001/IRJIET/2022.609020

Licence Copyright (c) 2026 International Research Journal of Innovations in Engineering and Technology creative common licence This work is licensed under Creative common Attribution Non Commercial 4.0 Internation Licence
References
  1. M. Hagiwara, and H. Akagi, "Control and Experiment of Pulse width-Modulated Modular Multilevel Converters," IEEE Trans. Power Electron., vol.24, no.7, pp.1737-1746, July 2009.
  2. P. Palanivel S.S. Dash Analysis of THD and output voltage performance for cascaded multilevel inverter using carrier pulse width modulation techniques,‖ IET Power Electronics,  Vol. 4, no. 8, pp. 951–958, 2011.
  3. Mr. PunitRatnani, Miss. Samruddhi S. Shaha and Dr. Archana G. Thosar, Simulation of Five-Level Inverter with Sinusoidal PWM  Carrier Technique Using MATLAB/Simulink (2014), pp. 367-376.
  4. PallaviAppasoArbune and Dr. Asha Gaikwad, Comparative Study of Three level and Five level Inverter, Vol.5, Issue 2, February 2016.
  5. Andreas Nordvall, “Multilevel Inverter Topology Survey,” Thesis for the Degree of Master of Science, 2011, pp.1-78.
  6. N.  Prabaharan  and K. Palanisamy,  “A  comprehensive review on  reduced switch multilevel  inverter topologies, modulation techniques and applications,” Renew. Sustain. Energy Rev., vol. 76, pp. 1248-1282, Sep. 2017.
  7. M. FarhadiKangarlu and E. Babaei, "A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters," in IEEE Transactions on Power Electronics, vol. 28, no. 2, pp. 625-636, Feb. 2013, doi: 10.1109/TPEL.2012.2203339.
  8. Palanivel, S.S. Dash “Analysis of THD and output voltage performance for cascaded multilevel inverter using carrier pulse width modulation technique” IET Power Electronics vol. 4, no. 8, pp. 951-958,2010.
  9. S.Sirisukpraserl, J.S. Lai, T.H. Liu. “Optimum harmonic reduction with a wide range of modulation indices for multilevel converter”, IEEE Trans. Ind. Electron., vol. 49, pp. 875– 881,2002.
  10. Andreas Nordvall, “Multilevel Inverter Topology Survey,” Thesis for the Degree of Master of Science, 2011, pp.1-78.
  11. Pari R., Sivakumar R., Sivaranjani S. Murugesan M., Different Types of Multilevel Inverter Topologies - A Technical Review,  International Journal of Advanced Engineering Technology, 7(1), 2016, 149-15.
  12. Najafi E Yatim, AHM, “Design and implementation of a new multilevel inverter topology,” Industrial electronics IEEE Transactions, vol. 59, no. 2, pp. 4148-4154, 2012.
  13. Manjrekar, P.K. Steimer, and T.A. Lipo, “Hybrid Multilevel Power  Conversion System: A Competitive Solution for High Power  Applications”, IEEE Trans. Ind. Applicat., vol. 36, no. 3, pp. 834- 841, May/June 2000.
  14. Maha G. Elsheikh, Mahrous E. Ahmed, Emad Abdelkarem, Mohamed Orabi, " Single-Phase Five-Level Inverter with Less Number of Power Elements" IEEE conference 2011.
  15. Agrawal V, Rathor B, Bhadu M et al. Discrete Time mode PSS Controller Techniques to Improve Stability of AC Microgrid. 2018 8th IEEE India Internaonal Conference on Power Electronics (IICPE), Jaipur, India. 2018; 1-5.
  16. M. D. Siddique, S. Mekhilef, N. M. Shah, A. Sarwar, A.  Iqbal and  M. A.  Memon, "A New Multilevel Inverter Topology with Reduce Switch Count," in IEEE Access, vol. 7, pp.  58584-58594, 2019, doi: 10.1109/ACCESS.2019.291443.
  17. Marif Daula, Saad Mekhileff, Noraisayah,  Adil Sarware.t.l, “A  new  multilevel  inverter  topology  with  reduce switch count”. IEEE Access, vol. 7, pp. 58584-58594, 2019.
  18. Koshti, Amol K., and M. N. Rao. ‘‘A brief review on multilevel inverter topologies.” 2017 International Conference on Data Management, Analytics and Innovation (ICDMAI). IEEE, 2017.
  19. G. Sridhar, P. Satish Kumar, M. Sushama, Phase Disposition PWM Techniques for Eleven level Cascaded Multilevel Inverter with Reduced number of Carriers, Asian Power Electronics Journal (APEJ) 11 (1) (2017) 1–5.
  20. Kamaldeep Boora, Jagdish Kumar, A novel cascaded asymmetrical multilevel inverter with reduced number of switches, IEEE Transactions on Industry Applications 55 (6) (2019) 7389–7399.
  21. Muhammad Najwan Hamidi, Dahaman Ishak, Muhammad Ammirrul Atiqi Mohd Zainuri, Chia Ai Ooi, ‘‘Multilevel inverter with improved basic unit structure for symmetric and asymmetric”.

Copyright @ 2026 IRJIET. All Right Reserved.

Licensed underCreative Commons Attribution 4.0 International License.